Broadcom and AI silicon firm FuriosaAI have entered a strategic partnership to develop a third-generation AI accelerator. The multi-die chiplet system is designed for inference workloads in hyperscale data centers and agentic AI.
The platform combines FuriosaAI’s Tensor Contraction Processor (TCP) architecture with Broadcom’s 2nm process technology. The hardware integrates HBM4/4E memory and high-bandwidth Ethernet networking solutions.
This collaboration creates a unified inference platform that merges compute, networking, and packaging technologies. Sampling for the new chip is scheduled for the first half of 2028.